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ISL97691
PCB Layout Considerations
PCB Layout with TQFN Package
Great care is needed in designing a PC board for stable ISL97691
operation. As shown in the “Typical Application Circuit” on
page 1, the separation of PGND and AGND is essential, keeping
the AGND referenced only local to the chip. This minimizes
switching noise injection to the feedback sensing and analog
areas, as well as eliminating DC errors form high current flow in
resistive PC board traces. PGND and AGND should be on the top
and bottom layers respectively in the two layer PCB. A star
ground connection should be formed by connecting the LED
ground return and AGND pins to the thermal pad with vias
(Figure 23). The ground connection should be into this ground
net, on the top plane. The bottom plane then forms a quiet
analog ground area that both shields components on the top
plane, as well as providing easy access to all sensitive
components. For example, the ground side of the ISET resistor
can be dropped to the bottom plane, providing a very low
impedance path back to the AGND pin, which does not have any
circulating high currents to interfere with it. The bottom plane
can also be used as a thermal ground, so the AGND area should
be sized sufficiently large to dissipate the required power. For
multi-layer boards, the AGND plane can be the second layer. This
provides easy access to the AGND net, but allows a larger
thermal ground and main ground supply to come up through the
thermal vias from a lower plane.
Figure 24 shows the example of the PCB layout of ISL97691. This
type of layout is particularly important for this type of product,
2. If possible, try to maintain central ground node on the board
and use the input capacitors to avoid excessive input ripple for
high output current supplies. The filtering capacitors should
be placed close to the VIN pin.
3. For optimum load regulation and true VOUT sensing, the OVP
resistors should be connected independently to the top of the
output capacitors and away from the higher dv/dt traces. The
OVP connection then needs to be as short as possible to the
pin. The AGND connection of the lower OVP components is
critical for good regulation.
4. The COMP network and the rest of the analog components
(on ISET, FSW, etc.) should be referenced to AGND.
5. The heat of the chip is mainly dissipated through the exposed
thermal pad so maximizing the copper area around is a good
idea. A solid ground is always helpful for the thermal and EMI
performance.
6. The inductor and input and output capacitors should be
mounted as tight as possible, to reduce the audible noise and
inductive ringing.
General Power PAD Design Considerations
Figure 23 shows an example of how to use vias to remove heat
from the IC. We recommend you fill the thermal pad area with
vias. A typical via array would be to fill the thermal pad foot print
with vias spaced such that the centre to centre spacing is three
times the radius of the via. Keep the vias small, but not so small
that their inside diameter prevents solder wicking through the
holes during reflow.
resulting in high current flow in the main loop’s traces. Careful
attention should be focused in the following layout details:
1. Boost input capacitors (CIN), output capacitors (COUT),
inductor and Schottky diode should be placed together in a
nice tight layout. Keeping the grounds of the input, and output
connected with low impedance and wide metal is very
important to keep these nodes closely coupled.
FIGURE 23. VIA PATTERN OF ISL97691 TQFN
15
FN7840.1
February 1, 2013
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制造商:Intersil Corporation 功能描述:4 CH W/12-BIT PWM DIMMING SINGLE CELL LI-ION BATTERY POWERED - Rail/Tube 制造商:Intersil Corporation 功能描述:IC LED DRVR BACKLIGHT 16TQFN 制造商:Intersil 功能描述:4CH w/12Bit PWM Dim Li-ION LED Driver
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Obsolescence Mitigation Program 标准包装:2,500 系列:- 恒定电流:- 恒定电压:- 拓扑:升压（升压），切换式电容器（充电泵） 输出数:1 内部驱动器:是 类型 - 主要:背光 类型 - 次要:白色 LED 频率:625kHz ~ 875kHz 电源电压:2.7 V ~ 5.3 V 输出电压:5V 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽） 供应商设备封装:10-µMAX 包装:带卷 (TR) 工作温度:-40°C ~ 85°C
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